Neuromorphic AI System

Targeted neuromorphic processor features ReRAM synaptic memory for on-chip learning and processing, suitable for IoT sensors in smart machines and for robotic visual understanding.
Despite recent advances in neuromorphic computing (NC), existing hardware implementations still have von-Neumann-like architectures which do not scale well with computationally intensive deep-learning algorithms. They lack on-chip learning capabilities due to challenges in implanting localized non-volatile memory on-chip.

IME’s neuromorphic research focuses on the fundamental shift in computing paradigm towards human-like pattern learning and recognition to enable disruptive applications such as high speed camera as visual sensors in advanced manufacturing and engineering. More specifically, we target (1) compact and non-volatile synapse realization, (2) scalable multi-core network-on-chip architecture and multi-bit RRAM-based synapses to closely mimic the brain’s dense connectivity and functionality and (3) modular, programmable cores for different deep network topologies such as fully-connected, CNN, which also offers advanced neuron features such as reconfigurable Inhibitory, excitatory, lateral connections and provision support for local/global learning.
Deep Learning AI System

AI-cube featuring energy efficient design and high density 3D stacking based on TSV architecture.
Energy-efficient module/circuits tailored for deep-learning is one of the key design approaches to deliver large scale deep learning computing performance. In order to address the hardware requirements for high accuracy, computational throughput essential for deep learning applications, co-optimization of system architecture and circuitry design with high density NVM (e.g. RRAM) and TSV technology will be essential.

In large scale deep learning applications, enormous data flow from the Giga-scale ReRAM to the processor is the actual power and performance bottle neck. To address this issue, IME’s deep learning research focuses on designing efficient memory access protocols and a high-speed direct memory access interface module to minimize the read latency and power consumption. At the same time, throughput will be augmented by leveraging on TSV architecture.
Sensor Interface IC

Accelerometer integrated circuit (IC).
IME’s sensor interface IC design IPs build on special circuit techniques of continuous time ∆∑ modulation based charge balancing and voltage-controlled oscillator (VCO) based digitization. Some of its works include high resolution accelerometer readout system-on-chip (SoC) for industrial applications such as vibration sensing and inertial navigation, ultra-low power capacitive, resistive, potentiostat, and biopotential readout ICs for sensing pressure, current and voltage in biomedical and industrial applications. These readout ICs can be coupled with direct digital interface for wireless sensor node (WSN) targeting IoT applications.
Power Management IC

Power management integrated circuit (PMIC) controller.
IME has demonstrated magnetic thin-film deposition and process integration methodology for embedding inductors in fan-out wafer level packaging (FOWLP). Its work on PMIC leverages the proven process integration methodology and focuses on thin-film magnetic inductor based integrated voltage regulator which can provide dynamic power delivery for power saving in mobile application processors and servers CPU. Some of its works include vibration energy harvester IC, wireless power receiver IC, and DC-DC converter with on-chip thin-film magnetic inductors. They are suitable for realizing integrated power management for IoT and wearable applications.
Ultra-Low-Power SoC and Hardware Security

(Top) Ultra-low-power sensor node processor; (Bottom) PUF & RNG IC.
IME has developed a suite of design techniques to realize an ultra-low-power microcontroller and digital signal processor (DSP), targeted for sensor signal processing in power constrained IoT applications. These energy efficient computing hardware employs novel design techniques at architecture-level and circuit-level such as reconfigurable local memory access for hardware accelerometers and dual-bus architecture with automatic bus sensing to achieve parallel processing and high energy efficiency. IME’s low-power SNP has been demonstrated for two smart sensing applications including neural signal processing and tire monitoring.

The integrated circuits digital team is also working on for high bit rate, low power and small form factor hardware security primitives such as random number generator (TRNG) and arbiter-based physical unclonable functions (PUF) which will be integrated to IME's secured processor for IoT applications.
Low-Power Wireless Connectivity

Ultra-wideband (UWB) transceiver to overcome interference and multipath fading for wireless communications in automotive.
IME’s portfolio of radio transceivers for sensor networks spanning broad spectrum of applications. For example, RF transceiver IP blocks which adopt a digital oriented design approach for TV white space (TVWS) Wi-Fi bands, applicable to asset tracking, smart grid, environmental and infrastructure monitoring; low-power wireless for IoT (2.4Ghz Zigbee) and machine-to-machine applications; 400MHz ARIB T67 radio for applications such as smart metering, remote control and health monitors. Some others include ultra-wideband (UWB) and sub-GHz custom radios for targeted applications.