Effect of Wafer Back Grinding on Low K Wafers

IME researchers have described an investigative study on the effect of wafer back grinding process on the active side of the chip. Nanoindentation and nanoscratch techniques combined with transmission electron microscopy (TEM) are used to determine the mechanical properties of the wafers. Characterisation results show that the back grinding process enhances the mechanical integrity of the stacks with low dielectric constant (k) as they experience improved fracture load, cohesive and/or adhesive strength. This study provides new insights and considerations for the implementation and selection of wafer thinning procedures on multilayered low-k wafers.

Reference:

Vasarla Nagendra Sekhar et. al., “Study on the Effect of Wafer Back Grinding Process on Nanomechanical Behavior of Multilayered Low-k Stack," IEEE Transactions on Microwave Components, Packaging and Manufacturing Technology, Vol. 2, Pg. 3 - 11, 2012