Multi-Chip Interposer and 3D Interconnects

Project objective

  • Table-top laboratory set-up is needed to produce, manipulate, control and measure qubits such as ion-traps;
  • Advanced micro-fabrication and 3D packaging is proposed as a way forward for miniaturization and scaling of such quantum computing devices


State-of-the Art

  • Wire-bonding limits form factor, performance and manufacturability;
  • Advanced 3D packaging and integrated silicon photonics are utilised


Technical approach

  • The electrical I/O are delivered by high aspect ratio copper through silicon via (TSV) instead of wire-bonding;
  • Integrated silicon photonics components for ion addressing and readout.



Project Leads
Prof. Chuan Seng TAN, NTU
Dr. Surya Bhattacharya, IME, A*STAR 


Last update : 1/25/2019 2:53:23 PM