SpEED Background

The emergence of connected electronic devices with sensing and computing capabilities has ushered in the Internet of Things (IoT) era; the need for real-time decision making at the data source, or “edge intelligence”, has assumed increased significance. There is a growing need for developing a high-performance computing hardware platforms with energy-efficient, GHz switching memory scalable edge intelligence. Furthermore, the limitation of Moore’s law is being reached within conventional materials and present technologies. Thus, the quest to develop integrated, beyond-CMOS infocomm technology (ICT) platforms has also become increasingly important.

Next-gen ICT elements should 1) operate on an inherently shorter time scale enabling faster processing, 2) possess intrinsic stability and robustness for scalability, and 3) integrate seamlessly with conventional CMOS processes. While battery-powered edge devices would require non-volatile memory (NVM) platforms for scaling up such capabilities, emerging NVM solutions are read-optimised — inherently limited in high-performance switching characteristics required for these applications. Bridging this large performance gap first requires moving towards NVM technology platforms whose “normally-off” state can drastically reduce power consumption.

The field of spintronics is focused on exploiting electron spin as a degree of freedom for applications in solid-state devices. Earlier pioneering works successfully exploiting both giant magnetoresistance (GMR) and tunnelling magnetoresistance (TMR) effects have led to the basis of reading and memory storage applications in electronic devices today, through the use of GMR read heads in hard disk drives for storage and magnetic tunnelling junctions (MTJ).

Next generation spintronics technologies are sought to further exploit the potential of spin physics to create devices with lower switching power, faster dynamics and higher endurance. One such avenue is via spin transfer torque (STT) — currently in manufacturing — where a spin polarised current can be used to control the magnetisation of a magnetic layer. 

Another particularly attractive avenue is the coupling of electron spin and momentum, known as spin-orbit coupling (SOC), recently found to be greatly enhanced at heavy metal (HM) – ferromagnet (FM) interfaces. In fact, such interfaces are commonly used within existing MRAM stacks for incidental purposes. Interfacial SOC provides a fast, energy-efficient means to switch magnetisation, and creates new topological phases (topological materials, magnetic skyrmions etc.) that are robust at room temperature (RT). The practical utility of these recently discovered phenomena is imminent given the inherent CMOS compatibility of host materials.

Figure adapted from A.Soumyanarayanan et al., Nature 539, 509-517(2016).

Key Contacts

Dr. Anjan Soumyanarayanan
Dr. Lim Sze Ter 

Last update : 2/11/2019 9:31:17 AM