Personal Details

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Dr. BERA Lakshmi Kanta

Senior Scientist I


Nanofabrication (NFB) Department

(65) 6319 4866

2 Fusionopolis Way. Innovis, #08-03, Singapore 138634

Research Details

-          Nanoimprinting Lithography

-          Si and III-V Semiconductor Devices

-          Microfluidic based devices for diagnostics

-          Optical devices

-              Design and Fabrication of microfluidic based devices for diagnostic applications.

-              Design and process integration of Si and III-V Semiconductor devices, device Physics.

-              Nanoimprting lithography.

- Process development for prototyping glass free 3D films for smartphones

- Development, Fabrication and Pilot production of Patterned Sapphire Substrates (PSS) via roll to plate nanoimprint technology

2009 – Current   Scientist III, IMRE

2007-2009          Charted Semiconductor Manufacturing  Ltd-Singapore, Senior Principal Engineer

2005 – 2007       Silterra Malaysian Sdn Bhd, Kulim Malaysai, Memeber of Technical Staff Research Fellow, NUS  

2001-2003          Institute of Microelectronics- Singapore, Senior Research Engineer

2001-2005          Institute of Microelectronics- Singapore, Memeber of Technical Staff

1999-2001          Research Fellow, NUS   

-          PhD, Indian Institute of Technology, Kharagpur, India, 1999

-          MSc (Physics), Vidyasagau University, India, 1992

-          BSc (Physics Hons.), Midnapore Colleg, Vidyasagar University, India, 1992

-          2007 IEEE Electron Devices Society (EDS) George E. Smith Award for the ground breaking work on "Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors" published in the IEEE Electron Device Letters (EDL) on March 2007 (Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors”,  Electron Device Letters, IEEE Volume 28,  Issue 3,  March 2007 Page(s):211 – 213)

-          CDIL Best Paper Award by The Institute of Electronics and Tele-communication Engineering, New Delhi, India (1997)

  • Nov 2009-To-date Research Scientist, Institute of Materials Research and Engineering (Singapore)
  • 2007-2009: Senior Principal Engineer Chartered Semicondutor Ltd-Singapore.
  • 2005 to 2007: MTS, Silterra Malaysian Sdn Bhd, Kulim Malaysia.
  • 2001-2005: MTS, Institute of Microelectronics, Singapore.
  • 1999-2001: Research Fellow, National University of Singapore.


-      Strained-Si Heterostructure Field Effect Devices, By C. K. Maiti, S. Chattopadhyay, and L. K. Bera, Published by CRC Press, 2007, ISBN 0750309938, 9780750309936, 423 pages


-       Hegde,Ravi S., Bera, L. K., ONG, K. S., Hong, S. C., Journal of Photonics for Energy,  2015, 5, 052099:1-10.

-       Kyaw, L. M.; Bera, L. K.; Bhat, T.N.; Liu, Y.; Tan, H. R.; Dolmanan, S. B.; Chor, E. F.; and Tripathy, S. J. Vac. Sci. Technol. B, 2015, 33, 051203:1–5.

-       Bera, L. K. ,  Ong,  K. S., Wong Z. Z, RSC Advances : 2014, 4, 38384–38388,

-       Kyaw, L. M.; Bera, L. K.; Liu. Y.; Bera, M. K.; Singh, S.P.; Dolmanan, S. B.; Tan. H. R.; Bhat, T. N.; Chor, E. F.; Tripathy, S. Appl. Phys. Lett. 2014, 105, 073504:1–5.

-       Bhat, T. N.; Dolmanan, S. B.; Dikme, Y.; Tan, H. R.; Bera, L. K.; Tripathy, S. J. Vac. Sci. Technol. B 2015, 32, 021206:1–8.

-       Bera, L. K., , Kajen, R. S.,  DOLMANAN, S. B., MANIPPADY,  K. K.,  Vivian, L. L. , Tham, W. H. TRIPATHY, S. , Ang, D. S., Ang, Bhat,T. N.,  ECS Solid State Letters,  2013,  2(12), Q105-Q108.

-       Tripathy,S.,  MANIPPADY,  K. K., Dolmanan,S. B., Vivian, K. X. Lin, TAN, H., Kajen, R. S., Bera, L. K., Teo, S. L.,  Compound semiconductor Magazine, 2012, pp 38-43.

-       Bera, L.K., Mukherjee-Roy, M., Abidha, B., Agarwal, A., Loh, W.Y., Tung, C.H., Kumar, R., Trigg, A.D., Foo, Y.L., Tripathy, S., Lo, G.Q., Balasubramanian, N., Kwong, D.L., Electron Device Letters, 2006, 27,  350 – 353.

-        Fang, W. W., Singh, N., Bera, L. K., Nguyen, H. S., Rustagi, S. C., Lo, G. Q., Balasubramanian, N., Kwong, D.-L.,  Electron Device Letters, 2007, 28,  211 – 213

-       Bliznetsov, V.N., Bera, L.K., Haw Yun Soo, Balasubramanian, N., Kumar, R., Guo-Qiang Lo, Won Jong Yoo, Chih Hung Tung, Linn, L., , IEEE Transactions on Semiconductor Manufacturing, 2007, 20,  143 – 149 .

-       Bera, L.K., Loh, W.Y., Guo, L.H., Zhang, X.W., Lo, G.Q., Balasubramanian, N., Kwong, D.-L.,
Electron Device Letters, 2006 , 27,   58 – 61

-          LO Guo-Qiang, BERA Lakshmi Kanta, GUO Li-Hui,  LOH Wei-Yip, LIAO Ebin; ZHANG Xiaowu, “ Method for straining a semiconductor wafer and a wafer substrate unit used therein”, US PatentNo: US20100052064, 2010

-          Lo Patrick Guo Oiang, Bera Lakshmi Kanta, Loh Wei Yip, Subramanian Balakumar,  Balasubramanian Narayanan, “Method of fabricating tensile strained layers and compressive strain layers for a CMOS device”,  United States Patent 7439165, 2008

-          Mathew Shajan, Bera Lakshmi Kanta, Balasubramanian Narayanan, “Gate electrode architecture for improved work function tuning and method of manufacture”,  United States Patent 20050275035, 2005

-          Lo Patrick Guo Oiang, Bera Lakshmi Kanta, Loh Wei Yip, Subramanian Balakumar,  Balasubramanian Narayanan ,  “ Method of fabricating strained channel devices”, United States Patent No.20060226483, 2006

-          Yu Hong Yu, Li Ming-fu, Kwong Dim-lee and Bera Lakshmi Kanta, “Thermal  robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof “, United States Patent Application 20050205947, 2005

Last updated on : 05 Apr 2019 10:09 AM