This seminar will provide an overview of the evolution of electronic packaging technologies from microscale to nanoscale. Participants will also gain an insight into the current and future trends in electronic packaging and also the challenges faced. A diversity of existing and emerging technologies will be covered, particularly in the areas of materials, processes and modelling.
8.45 am : Registration
9.00 am : Welcome and Overview of the Joining Technology Group in SIMTech by Dr Wei Jun, SIMTech
9.15 am : Trends and Issues in Electronic Packaging by Prof CP Wong, Georgia Institute of Technology
Abstract : The demands for lighter, smaller, higher packing density, higher performance yet lower cost electronics have created many challenging opportunities for electronic packaging. This talk provides an overview of electronic packaging in the present as well as its future trends.
10.45 am : Refreshments & Networking
11.00 am : Micro-doping in Ultrafine-grained Gold Bonding Wires by Dr Effie Chew Yeong Huey, Heraeus
Abstract: Wire bonding remains the dominant form of interconnection technology, and is expected to be used in 85% of total IC units worldwide by 2010. Wire manufacturers typically design wire to suit respective application via manipulating composition and process. In this work, in-depth analyses were performed on gold wire that is doped with calcium, where calcium is one of the well-known dopant in Au wire industry. The objective is to identify the effects and mechanisms of calcium in gold wire, where peculiar effects of concurrent strengthening and ductilisation are observed. From there, criterions are established for future identification of potential dopants.
11.45 am : Wafer Level 3-D Integration of ICs by A/P Tan Chuan Seng, Nanyang Technological University (NTU)
Abstract: Three-dimensional (3-D) stacking of ultra-thin ICs is identified as an inevitable solution for future system miniaturisation and functional diversification. 3-D integration offers a long list of benefits: (i) compact form factor, (ii) density multiplication, (iii) reduced interconnection latency and power consumption, (iv) bandwidth enhancement, and (v) heterogeneous integration. In this 3-D implementation, thinned IC layers are seamlessly bonded with a reliable bonding medium and electrically interconnected with through silicon via (TSV). This talk provides an overview of the emerging field of 3-D integration of integrated circuits. It covers motivations and potential benefits, technology platforms, and process integration strategies. In particular, recent progress in low temperature Cu-Cu diffusion bonding is discussed. An updated status will be given as well as a list of challenges faced by the industry. It ends with an outlook of future development in this exciting field.
12.30pm : Lunch & Networking
1.45 pm : Multi-paradigm Simulations at the Nanoscale : Methodology and Applications to Functional Carbon Materials by A/P Su Haibin, Nanyang Technological University (NTU)
Abstract: Multiparadigm methods to span the scales from quantum mechanics to practical issues of functional nanoassembly and nanofabrication are enabling first principles predictions to guide and complement the experimental developments by designing and optimising computationally the materials compositions and structures to assemble nanoscale systems with the requisite properties. In this talk, we employ multi-paradigm approaches to investigate functional carbon materials with versatile character, including fullerene, carbon nanotube (CNT), graphene, and related hybrid structures, which have already created an enormous impact on next generation nano devices. The topics will cover the reaction dynamics of C60 dimerization and the more challenging complex tubular fullerene formation process in the peapod structures; the computational design of a new generation of peapod nano-oscillators, the predicted magnetic state in NanoBuds; and opto-electronic properties of graphene nanoribbons.
2.30 pm : Advances on Nanomaterials and Composites for Advanced Electronic and Photonic Packaging by Prof CP Wong, Georgia Institute of Technology
Abstract: The advancement of semiconductor technology is mainly due to the advances of materials, especially polymeric materials. These include the use of polymers as: resists (for deep submicron lithography), adhesives (both conductive and non conductive for interconnects), interlayer dielectrics (low k, low loss dielectrics for high signal transmissions and low loss signal transmission), encapsulants (discrete and wafer level packaging for device protection), embedded passives (high K for capacitors and high Q materials for inductors for high density substrates) etc. This presentation will review some of the recent advances of polymeric materials and polymer nanocomposites that are currently being investigated for these types of applications: such as lead-free electrically conductive adhesives (ECAs) with self assembly monolayer molecular wires for fine pitch and high current density interconnects, flip chip and wafer level underfills, nano lead-free alloys for low temperature interconnects, nanometal particle composites for high k embedded passives, well-aligned carbon nanotubes and graphenes for high current interconnects and high thermal interface materials (TIMs), metal assist etching for through silicon via(TSV) for stacked wafer 3D interconnects, and superhydrophobic self-clean two tiers lotus surface coating for high efficiency solar cell applications.
4.00 pm : Q & A
4.30pm : Lab Tour & End of Seminar
About the speakers
Prof C P Wong is a Regents’ Professor and the Charles Smithgall Institute Endowed Chair at the School of Materials Science and Engineering at Georgia Institute of Technology (GT). He received his BS degree from Purdue University, and his PhD degree (with Prof. Bill Horrocks) from the Pennsylvania State University. After his doctoral study, he was awarded a two-year postdoctoral fellowship with Nobel Laureate Professor Henry Taube at Stanford University. Prior to joining GT in 1996, he was with AT&T Bell Laboratories for many years and became an AT&T Bell Laboratories Fellow in 1992.
His research interests lie in the fields of polymeric electronic materials, electronic, photonic and MEMS packaging and interconnect, interfacial adhesions, nano-functional material syntheses and characterisations. nano-composites such as well-aligned carbon nanotubes, grahenes, lead-free alloys, flip chip underfill, ultra high k capacitor composites and novel lotus effect coating materials. He received many awards, among those, the AT&T Bell Labs Fellow Award in 1992, the IEEE CPMT Society Outstanding Sustained Technical Contributions Award in 1995, the IEEE Third Millennium Medal in 2000, the IEEE EAB Education Award in 2001, the IEEE CPMT Society Exceptional Technical Contributions Award in 2002, the Georgia Tech Class 1934 Distinguished Professor Award in 2004, named holder of the Charles Smithgall Chair (one of the two GT Institute Chairs) in 2005, the GT Outstanding PhD Thesis Advisor Award, the IEEE Components, Packaging and Manufacturing Technology Field Award in 2006, the Sigma Xi’s Monie Ferst Award in 2007, the Society of Manufacturing Engineers’ Total Excellence in Electronic Manufacturing Award in 2008 and the IEEE CPMT David Feldman Award in 2009.
He holds over 50 U.S. patents, and has published over 900 technical papers, co-authored and edited 10 books and is a member of the National Academy of Engineering since 2000.
Effie Chew Yeong Huey was awarded her PhD degree in Materials Science and Engineering from the Nanyang Technological University (NTU), Singapore. Her thesis topic involves extensive characterisation of material properties and microstructural studies on doped-gold wires. Her doctoral work is a collaborative project between NTU and Heraeus Materials Singapore. She has then been working as Advanced Research & Development engineer and acting project manager at Heraeus Materials Singapore for 4 years. Her responsibilities include managing gold wire product development and taking care of customer issues on existing gold wire products.
Chuan Seng Tan received his BEng degree in electrical engineering from University of Malaya, Malaysia, in 1999. Subsequently, he completed his MEng degree in advanced materials from the National University of Singapore under the Singapore-MIT Alliance (SMA) program in 2001. He then joined the Institute of Microelectronics, Singapore, as a research engineer where he worked on process integration of strained-Si/relaxed-SiGe heterostructure devices. In the fall of 2001, he began his doctoral work at the Massachusetts Institute of Technology, Cambridge, USA, and was awarded a PhD degree in electrical engineering in 2006. He was the recipient of the Applied Materials Graduate Fellowship for 2003-2005. In 2003, he spent his summer interning at Intel Corporation, Oregon. He joined NTU in 2006 as a Lee Kuan Yew Postdoctoral Fellow and since July 2008, he is a holder of the inaugural Nanyang Assistant Professorship. His research interests are semiconductor process technology and device physics. Currently he is working on process technology of three-dimensional integrated circuits (3-D ICs). He co-edited a book on “Wafer Level 3-D ICs Process Technology” and it was published by Springer (ISBN 978-0-387-76532-7). He has numerous publications on 3-D technology including two US patent inventions. He is a member of IEEE.
Haibin Su is an Assistant Professor at School of Materials Science and Engineering, Nanyang Technological University. He graduated from SUNY at Stony Brook, while performing his thesis projects in Center for Data Intensive Computing and Materials Science Department at Brookhaven National Laboratory. Then he went to Caltech for his PostDoctoral prior to joining NTU. His research interest includes development and application of theoretical and computational materials science: i.e., quantum-mechanical and classical simulations and modeling of the electronic, structural, energetical, and dynamical properties of functional materials, emergent collective properties of condensed matter systems, in particular, at nanometer scales.
Who Should Attend
Researchers, academics, R&D managers and engineers from precision engineering, chemical and electronics clusters.
This is NON CHARGEABLE event. Please register online to reserve a seat.
Seats are available on a first-come, first-served basis.
Closing date: 19 August 2009
For technical enquiries:
Dr Sharon Nai, Tel: 92260891, Email: mlnai@SIMTech.a-star.edu.sg
For general enquiries:
Samantha Chan at Email: email@example.com
Presentation by Prof CP Wong