Cryogenic Control and Packaging

List of Selected Publications

1. K.-J. Chui et al, “Demonstration of a CMOS-Compatible Superconducting Cryogenic Interposer for Advanced Quantum Processors” IEEE Electronic Components and Technology Conference (ECTC), Florida, May 2023
   
   
2. K. Masaya et al, "One-step TSV process development for 4-layer wafer stacked DRAM,” IEEE Electronic Components and Technology Conference (ECTC), May 2021
   
   
3. H. Ji, “Wafer Level High Density Hybrid Bonding for High Performance Computing,” IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2020
   
   
4. K.-J. Chui et al, “A Fully Integrated 2-Tier Embedded 3D Capacitor with High Aspect Ratio TSV,” IEEE Electronic Components and Technology Conference (ECTC), accepted for May 2019
   
   
5. K.-J. Chui et al, " A Novel Method for Air-gap Formation around Via-Middle (VM) TSVs  for Effective Reduction in Keep-Out Zones (KOZ) and Cross-talk," IEEE Electronic Components and Technology Conference (ECTC), Florida, May 2017
   
   
6. K.-J. Chui et al, " Electrical Characterization of CMP-less Via-Last TSV under Reliability Stress Conditions," IEEE Electronic Components and Technology Conference (ECTC), Florida, May 2017
   
   
7. C. Wang et al, “Passive Devices Fabrication on FOWLP and Characterization for RF Applications” IEEE Electronic Components and Technology Conference (ECTC) Florida, May 2017
   
   
8. K.-J Chui et al, “A Cost-Effective, CMP-Less, Via-Last TSV Process for High Density RDL Applications”, IEEE Electronic Components and Technology Conference (ECTC) 2015
   
   
9. Mingbin Yu et al, “3D Electro-Optical Integration Based on High-Performance Si Photonics TSV Interposer” OFC 2015
   
   
10. X. Zhang et al, "Heterogeneous 2.5D Integration on Through Silicon Interposer," Applied Physics Review 2, 021308 (2015), pages 021308- 1-58, 2015.